Gate driver topologies, concepts and challenges for WBG devices

Nicolas Rouger

B.E.Eng’02 (ENS, Univ. Paris-Sud Orsay, France) M.E.Eng ’05 & PhD.’08 (Grenoble Institute of Technology, France), Habil.’15, is CNRS senior scientist and group leader (Laplace Lab, Toulouse). While supervising 51 students, he contributed to more than 30 tape outs, in Silicon CMOS & power technologies, GaN and Diamond, advancing the frontiers of integration, gate drivers and power semiconductor devices. Dissemination within IEEE ISPSD (2006-2024) includes CMOS integrated ultra-fast short circuit detection and feedback loop for dv/dt control, optical gate driver (analog, digital and power), and more.